Deliver high-quality AI accelerator functional models for architecture validation, NPU hardware/software/compiler development, and architecture design.
Responsibilities
- Develop architecture functional models, analyze model results, and propose architecture and microarchitecture improvements.
- Build and improve tools for architecture research, hardware functional verification, and performance analysis.
- Develop functional, performance, and power test plans and test cases for hardware verification and analysis.
- Collaborate with hardware design teams to support hardware verification.
- Collaborate with software teams to support driver and compiler development.
Requirements
- Master's degree or above in computer science, applied mathematics, or a related field.
- Proficiency in C++ with strong knowledge of algorithms and data structures.
- Understanding of computer architecture; CPU/NPU architecture familiarity is preferred.
- Understanding of neural-network fundamentals.
- Strong communication and teamwork skills.